• Principal Engineer, Asic Development Engineering

• Hsinchu |    Feb 4, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Staff Engineer, Asic Development Engineering

• Hsinchu |    Jan 26, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Jan 14, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Jan 10, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Jan 7, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Jan 3, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Jan 2, 2018 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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• Asic Design Verification Engineer

• Hsinchu |    Dec 31, 2017 Western Digital
• Western Digital - Hsinchu County - Essential Duties and responsibilities:Definition and design of test-bench and test plan for verifying Chip Level RTLDevelop complex tes...
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